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4 Commits

Author SHA1 Message Date
darkress
54381896c3 increment PC after every Instruction 2023-06-12 13:24:11 +02:00
darkress
184c49f3ae implemented btfss Instruction (#28)
Co-authored-by: Darkress <30271678+DarkressX@users.noreply.github.com>
Reviewed-on: darkress/pic16f84-sim#28
2023-06-07 21:34:23 +02:00
darkress
5cb1573a08 implemented btfsc Instruction (#27)
Co-authored-by: Darkress <30271678+DarkressX@users.noreply.github.com>
Reviewed-on: darkress/pic16f84-sim#27
2023-06-07 21:31:11 +02:00
darkress
d11f1b06f6 implemented bsf Instruction (#26)
Co-authored-by: Darkress <30271678+DarkressX@users.noreply.github.com>
Reviewed-on: darkress/pic16f84-sim#26
2023-06-07 21:19:12 +02:00
10 changed files with 72 additions and 12 deletions

View File

@@ -13,8 +13,8 @@ class Main
ArrayList<Command> program = new ArrayList<>(); ArrayList<Command> program = new ArrayList<>();
Memory.workingRegister = 0x01; Memory.workingRegister = 0x01;
Memory.setRegister(0x14, 0xA5); //240 << 224 Memory.setRegister(0x14, 0xA7); //240 << 224
program.add(CommandDecoder.decode(0x1594)); program.add(CommandDecoder.decode(0x1C94));
for(int i = 0; i < program.size(); i++) for(int i = 0; i < program.size(); i++)
{ {
program.get(ProgramCounter.getPc()).execute(); program.get(ProgramCounter.getPc()).execute();

View File

@@ -1,6 +1,7 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Andlw extends LiteralCommandUtils implements Command public class Andlw extends LiteralCommandUtils implements Command
{ {
@@ -18,5 +19,6 @@ public class Andlw extends LiteralCommandUtils implements Command
checkZeroBit(result); checkZeroBit(result);
Memory.workingRegister = result % 256; Memory.workingRegister = result % 256;
ProgramCounter.incPC();
} }
} }

View File

@@ -0,0 +1,29 @@
package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Btfsc extends BitOrientedCommandUtils implements Command
{
private final int address;
private int bitPlacement;
public Btfsc(int input)
{
address = input & 0x007F;
bitPlacement = checkBitPlacement(input);
}
@Override
public void execute()
{
int result = Memory.getRegister(address);
if((result & (1 << bitPlacement)) == 0) //Test if bit is clear
{
ProgramCounter.incPC();
}
ProgramCounter.incPC();
}
}

View File

@@ -0,0 +1,29 @@
package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Btfss extends BitOrientedCommandUtils implements Command
{
private final int address;
private int bitPlacement;
public Btfss(int input)
{
address = input & 0x007F;
bitPlacement = checkBitPlacement(input);
}
@Override
public void execute()
{
int result = Memory.getRegister(address);
if((result & (1 << bitPlacement)) > 0) //Test if bit is set
{
ProgramCounter.incPC();
}
ProgramCounter.incPC();
}
}

View File

@@ -25,8 +25,7 @@ public class Decfsz extends FileRegisterCommandUtils implements Command
if((result % 256) == 0) if((result % 256) == 0)
{ {
Nop nop = new Nop(); ProgramCounter.incPC();
nop.execute(); // TODO: What happens if an interrupt gets triggered during the nop execution?
} }
ProgramCounter.incPC(); ProgramCounter.incPC();
} }

View File

@@ -25,8 +25,7 @@ public class Incfsz extends FileRegisterCommandUtils implements Command
if((result % 256) == 0) if((result % 256) == 0)
{ {
Nop nop = new Nop(); ProgramCounter.incPC();
nop.execute(); // TODO: What happens if an interrupt gets triggered during the nop execution?
} }
ProgramCounter.incPC(); ProgramCounter.incPC();
} }

View File

@@ -1,6 +1,7 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Iorlw extends LiteralCommandUtils implements Command public class Iorlw extends LiteralCommandUtils implements Command
{ {
@@ -18,5 +19,6 @@ public class Iorlw extends LiteralCommandUtils implements Command
checkZeroBit(result); checkZeroBit(result);
Memory.workingRegister = result % 256; Memory.workingRegister = result % 256;
ProgramCounter.incPC();
} }
} }

View File

@@ -1,6 +1,7 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Sublw extends LiteralCommandUtils implements Command public class Sublw extends LiteralCommandUtils implements Command
{ {
@@ -41,5 +42,6 @@ public class Sublw extends LiteralCommandUtils implements Command
checkDigitCarryBit(literal); checkDigitCarryBit(literal);
Memory.workingRegister = result % 256; Memory.workingRegister = result % 256;
ProgramCounter.incPC();
} }
} }

View File

@@ -1,6 +1,7 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Xorlw extends LiteralCommandUtils implements Command public class Xorlw extends LiteralCommandUtils implements Command
{ {
@@ -18,5 +19,6 @@ public class Xorlw extends LiteralCommandUtils implements Command
checkZeroBit(result); checkZeroBit(result);
Memory.workingRegister = result % 256; Memory.workingRegister = result % 256;
ProgramCounter.incPC();
} }
} }

View File

@@ -61,19 +61,15 @@ public class CommandDecoder
case 0x1400: case 0x1400:
return new Bsf(input); return new Bsf(input);
case 0x1800: case 0x1800:
//btfsc(); return new Btfsc(input);
break;
case 0x1C00: case 0x1C00:
//btfss(); return new Btfss(input);
break;
} }
switch(input & 0x3E00) switch(input & 0x3E00)
{ {
case 0x3E00: case 0x3E00:
//addlw();
return new Addlw(input); return new Addlw(input);
//break;
case 0x3C00: case 0x3C00:
return new Sublw(input); return new Sublw(input);
} }