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Author SHA1 Message Date
Darkress
c6b5e3989e implemented btfsc Instruction 2023-06-07 21:30:49 +02:00
36 changed files with 10 additions and 125 deletions

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@@ -13,8 +13,8 @@ class Main
ArrayList<Command> program = new ArrayList<>(); ArrayList<Command> program = new ArrayList<>();
Memory.workingRegister = 0x01; Memory.workingRegister = 0x01;
Memory.setRegister(0x14, 0xA7); //240 << 224 Memory.setRegister(0x14, 0xA5); //240 << 224
program.add(CommandDecoder.decode(0x1C94)); program.add(CommandDecoder.decode(0x1894));
for(int i = 0; i < program.size(); i++) for(int i = 0; i < program.size(); i++)
{ {
program.get(ProgramCounter.getPc()).execute(); program.get(ProgramCounter.getPc()).execute();

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -24,6 +23,5 @@ public class Addlw extends LiteralCommandUtils implements Command
Memory.workingRegister = result % 256; Memory.workingRegister = result % 256;
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -26,6 +25,5 @@ public class Addwf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,8 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Andlw extends LiteralCommandUtils implements Command public class Andlw extends LiteralCommandUtils implements Command
{ {
@@ -20,7 +18,5 @@ public class Andlw extends LiteralCommandUtils implements Command
checkZeroBit(result); checkZeroBit(result);
Memory.workingRegister = result % 256; Memory.workingRegister = result % 256;
ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -24,6 +23,5 @@ public class Andwf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -23,6 +22,5 @@ public class Bcf extends BitOrientedCommandUtils implements Command
Memory.setRegister(address, result); Memory.setRegister(address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -23,6 +22,5 @@ public class Bsf extends BitOrientedCommandUtils implements Command
Memory.setRegister(address, result); Memory.setRegister(address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -23,10 +22,8 @@ public class Btfsc extends BitOrientedCommandUtils implements Command
if((result & (1 << bitPlacement)) == 0) //Test if bit is clear if((result & (1 << bitPlacement)) == 0) //Test if bit is clear
{ {
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,32 +0,0 @@
package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Btfss extends BitOrientedCommandUtils implements Command
{
private final int address;
private int bitPlacement;
public Btfss(int input)
{
address = input & 0x007F;
bitPlacement = checkBitPlacement(input);
}
@Override
public void execute()
{
int result = Memory.getRegister(address);
if((result & (1 << bitPlacement)) > 0) //Test if bit is set
{
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
import de.darkress.pic16f84sim.microcontroller.Stack; import de.darkress.pic16f84sim.microcontroller.Stack;
@@ -18,6 +17,5 @@ public class Call extends LiteralCommandUtils implements Command
{ {
Stack.push(ProgramCounter.getPc() + 1); Stack.push(ProgramCounter.getPc() + 1);
ProgramCounter.setPcFrom11BitLiteral(literal); ProgramCounter.setPcFrom11BitLiteral(literal);
Cycles.addToCycles(2);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -24,6 +23,5 @@ public class Clrf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -15,6 +14,5 @@ public class Clrw extends FileRegisterCommandUtils implements Command
Memory.workingRegister = result; Memory.workingRegister = result;
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -24,6 +23,5 @@ public class Comf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -24,6 +23,5 @@ public class Decf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result % 256); // Catch underflow writeToDestination(destinationBit, address, result % 256); // Catch underflow
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -26,10 +25,9 @@ public class Decfsz extends FileRegisterCommandUtils implements Command
if((result % 256) == 0) if((result % 256) == 0)
{ {
ProgramCounter.incPC(); Nop nop = new Nop();
Cycles.addToCycles(1); nop.execute(); // TODO: What happens if an interrupt gets triggered during the nop execution?
} }
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Goto extends LiteralCommandUtils implements Command public class Goto extends LiteralCommandUtils implements Command
@@ -16,6 +15,5 @@ public class Goto extends LiteralCommandUtils implements Command
public void execute() public void execute()
{ {
ProgramCounter.setPcFrom11BitLiteral(literal); ProgramCounter.setPcFrom11BitLiteral(literal);
Cycles.addToCycles(2);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -24,6 +23,5 @@ public class Incf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result % 256); // Catch underflow writeToDestination(destinationBit, address, result % 256); // Catch underflow
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -26,10 +25,9 @@ public class Incfsz extends FileRegisterCommandUtils implements Command
if((result % 256) == 0) if((result % 256) == 0)
{ {
ProgramCounter.incPC(); Nop nop = new Nop();
Cycles.addToCycles(1); nop.execute(); // TODO: What happens if an interrupt gets triggered during the nop execution?
} }
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,8 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Iorlw extends LiteralCommandUtils implements Command public class Iorlw extends LiteralCommandUtils implements Command
{ {
@@ -20,7 +18,5 @@ public class Iorlw extends LiteralCommandUtils implements Command
checkZeroBit(result); checkZeroBit(result);
Memory.workingRegister = result % 256; Memory.workingRegister = result % 256;
ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -24,6 +23,5 @@ public class Iorwf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -24,6 +23,5 @@ public class Movf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -18,6 +17,5 @@ public class Movlw extends LiteralCommandUtils implements Command
{ {
Memory.workingRegister = literal; Memory.workingRegister = literal;
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -22,6 +21,5 @@ public class Movwf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Nop extends LiteralCommandUtils implements Command public class Nop extends LiteralCommandUtils implements Command
@@ -11,6 +10,5 @@ public class Nop extends LiteralCommandUtils implements Command
{ {
// Do nothing, just increment the PC // Do nothing, just increment the PC
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
import de.darkress.pic16f84sim.microcontroller.Stack; import de.darkress.pic16f84sim.microcontroller.Stack;
@@ -19,6 +18,5 @@ public class Retlw extends LiteralCommandUtils implements Command
{ {
Memory.workingRegister = literal; Memory.workingRegister = literal;
ProgramCounter.setPcFromStack(Stack.pop()); ProgramCounter.setPcFromStack(Stack.pop());
Cycles.addToCycles(2);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
import de.darkress.pic16f84sim.microcontroller.Stack; import de.darkress.pic16f84sim.microcontroller.Stack;
@@ -10,6 +9,5 @@ public class Return extends LiteralCommandUtils implements Command
public void execute() public void execute()
{ {
ProgramCounter.setPcFromStack(Stack.pop()); ProgramCounter.setPcFromStack(Stack.pop());
Cycles.addToCycles(2);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -32,6 +31,5 @@ public class Rlf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, register); writeToDestination(destinationBit, address, register);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -32,6 +31,5 @@ public class Rrf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, register); writeToDestination(destinationBit, address, register);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,8 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Sublw extends LiteralCommandUtils implements Command public class Sublw extends LiteralCommandUtils implements Command
{ {
@@ -43,7 +41,5 @@ public class Sublw extends LiteralCommandUtils implements Command
checkDigitCarryBit(literal); checkDigitCarryBit(literal);
Memory.workingRegister = result % 256; Memory.workingRegister = result % 256;
ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -46,6 +45,5 @@ public class Subwf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result % 256); writeToDestination(destinationBit, address, result % 256);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -24,6 +23,5 @@ public class Swapf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,8 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Xorlw extends LiteralCommandUtils implements Command public class Xorlw extends LiteralCommandUtils implements Command
{ {
@@ -20,7 +18,5 @@ public class Xorlw extends LiteralCommandUtils implements Command
checkZeroBit(result); checkZeroBit(result);
Memory.workingRegister = result % 256; Memory.workingRegister = result % 256;
ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,6 +1,5 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -24,6 +23,5 @@ public class Xorwf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -63,13 +63,16 @@ public class CommandDecoder
case 0x1800: case 0x1800:
return new Btfsc(input); return new Btfsc(input);
case 0x1C00: case 0x1C00:
return new Btfss(input); //btfss();
break;
} }
switch(input & 0x3E00) switch(input & 0x3E00)
{ {
case 0x3E00: case 0x3E00:
//addlw();
return new Addlw(input); return new Addlw(input);
//break;
case 0x3C00: case 0x3C00:
return new Sublw(input); return new Sublw(input);
} }

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@@ -1,14 +0,0 @@
package de.darkress.pic16f84sim.microcontroller;
public class Cycles {
private static int cycles = 0;
public static void addToCycles(int increase)
{
cycles += increase;
}
public static int getCycles() {
return cycles;
}
}

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@@ -62,7 +62,6 @@ public class Memory
if(address == 0x2) //Check if PCL is destination if(address == 0x2) //Check if PCL is destination
{ {
ProgramCounter.loadPc(); ProgramCounter.loadPc();
Cycles.addToCycles(1);
} }
} }