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1 Commits

Author SHA1 Message Date
darkress
97e2c26d01 increase Cycles after every Instruction 2023-06-12 13:34:25 +02:00
34 changed files with 83 additions and 0 deletions

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -23,5 +24,6 @@ public class Addlw extends LiteralCommandUtils implements Command
Memory.workingRegister = result % 256; Memory.workingRegister = result % 256;
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -25,5 +26,6 @@ public class Addwf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -20,5 +21,6 @@ public class Andlw extends LiteralCommandUtils implements Command
Memory.workingRegister = result % 256; Memory.workingRegister = result % 256;
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -23,5 +24,6 @@ public class Andwf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -22,5 +23,6 @@ public class Bcf extends BitOrientedCommandUtils implements Command
Memory.setRegister(address, result); Memory.setRegister(address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -22,5 +23,6 @@ public class Bsf extends BitOrientedCommandUtils implements Command
Memory.setRegister(address, result); Memory.setRegister(address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -22,8 +23,10 @@ public class Btfsc extends BitOrientedCommandUtils implements Command
if((result & (1 << bitPlacement)) == 0) //Test if bit is clear if((result & (1 << bitPlacement)) == 0) //Test if bit is clear
{ {
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -22,8 +23,10 @@ public class Btfss extends BitOrientedCommandUtils implements Command
if((result & (1 << bitPlacement)) > 0) //Test if bit is set if((result & (1 << bitPlacement)) > 0) //Test if bit is set
{ {
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
import de.darkress.pic16f84sim.microcontroller.Stack; import de.darkress.pic16f84sim.microcontroller.Stack;
@@ -17,5 +18,6 @@ public class Call extends LiteralCommandUtils implements Command
{ {
Stack.push(ProgramCounter.getPc() + 1); Stack.push(ProgramCounter.getPc() + 1);
ProgramCounter.setPcFrom11BitLiteral(literal); ProgramCounter.setPcFrom11BitLiteral(literal);
Cycles.addToCycles(2);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -23,5 +24,6 @@ public class Clrf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -14,5 +15,6 @@ public class Clrw extends FileRegisterCommandUtils implements Command
Memory.workingRegister = result; Memory.workingRegister = result;
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -23,5 +24,6 @@ public class Comf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -23,5 +24,6 @@ public class Decf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result % 256); // Catch underflow writeToDestination(destinationBit, address, result % 256); // Catch underflow
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -26,7 +27,9 @@ public class Decfsz extends FileRegisterCommandUtils implements Command
if((result % 256) == 0) if((result % 256) == 0)
{ {
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Goto extends LiteralCommandUtils implements Command public class Goto extends LiteralCommandUtils implements Command
@@ -15,5 +16,6 @@ public class Goto extends LiteralCommandUtils implements Command
public void execute() public void execute()
{ {
ProgramCounter.setPcFrom11BitLiteral(literal); ProgramCounter.setPcFrom11BitLiteral(literal);
Cycles.addToCycles(2);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -23,5 +24,6 @@ public class Incf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result % 256); // Catch underflow writeToDestination(destinationBit, address, result % 256); // Catch underflow
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -26,7 +27,9 @@ public class Incfsz extends FileRegisterCommandUtils implements Command
if((result % 256) == 0) if((result % 256) == 0)
{ {
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -20,5 +21,6 @@ public class Iorlw extends LiteralCommandUtils implements Command
Memory.workingRegister = result % 256; Memory.workingRegister = result % 256;
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -23,5 +24,6 @@ public class Iorwf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -23,5 +24,6 @@ public class Movf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -17,5 +18,6 @@ public class Movlw extends LiteralCommandUtils implements Command
{ {
Memory.workingRegister = literal; Memory.workingRegister = literal;
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -21,5 +22,6 @@ public class Movwf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Nop extends LiteralCommandUtils implements Command public class Nop extends LiteralCommandUtils implements Command
@@ -10,5 +11,6 @@ public class Nop extends LiteralCommandUtils implements Command
{ {
// Do nothing, just increment the PC // Do nothing, just increment the PC
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
import de.darkress.pic16f84sim.microcontroller.Stack; import de.darkress.pic16f84sim.microcontroller.Stack;
@@ -18,5 +19,6 @@ public class Retlw extends LiteralCommandUtils implements Command
{ {
Memory.workingRegister = literal; Memory.workingRegister = literal;
ProgramCounter.setPcFromStack(Stack.pop()); ProgramCounter.setPcFromStack(Stack.pop());
Cycles.addToCycles(2);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
import de.darkress.pic16f84sim.microcontroller.Stack; import de.darkress.pic16f84sim.microcontroller.Stack;
@@ -9,5 +10,6 @@ public class Return extends LiteralCommandUtils implements Command
public void execute() public void execute()
{ {
ProgramCounter.setPcFromStack(Stack.pop()); ProgramCounter.setPcFromStack(Stack.pop());
Cycles.addToCycles(2);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -31,5 +32,6 @@ public class Rlf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, register); writeToDestination(destinationBit, address, register);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -31,5 +32,6 @@ public class Rrf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, register); writeToDestination(destinationBit, address, register);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -43,5 +44,6 @@ public class Sublw extends LiteralCommandUtils implements Command
Memory.workingRegister = result % 256; Memory.workingRegister = result % 256;
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -45,5 +46,6 @@ public class Subwf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result % 256); writeToDestination(destinationBit, address, result % 256);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -23,5 +24,6 @@ public class Swapf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -20,5 +21,6 @@ public class Xorlw extends LiteralCommandUtils implements Command
Memory.workingRegister = result % 256; Memory.workingRegister = result % 256;
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -1,5 +1,6 @@
package de.darkress.pic16f84sim.commands; package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory; import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter; import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
@@ -23,5 +24,6 @@ public class Xorwf extends FileRegisterCommandUtils implements Command
writeToDestination(destinationBit, address, result); writeToDestination(destinationBit, address, result);
ProgramCounter.incPC(); ProgramCounter.incPC();
Cycles.addToCycles(1);
} }
} }

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@@ -0,0 +1,14 @@
package de.darkress.pic16f84sim.microcontroller;
public class Cycles {
private static int cycles = 0;
public static void addToCycles(int increase)
{
cycles += increase;
}
public static int getCycles() {
return cycles;
}
}

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@@ -62,6 +62,7 @@ public class Memory
if(address == 0x2) //Check if PCL is destination if(address == 0x2) //Check if PCL is destination
{ {
ProgramCounter.loadPc(); ProgramCounter.loadPc();
Cycles.addToCycles(1);
} }
} }