* Added addlw command * Write to program list * Included CommandUtils as helpter class. Sorted classes into packages * Revert changes on HelloWorld * Revert "Revert changes on HelloWorld" This reverts commit a08a336864fb2aa2bbc5a4e37ca360765774965e. * Added example execution of Addlw command
126 lines
3.3 KiB
Java
126 lines
3.3 KiB
Java
package registers;
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import java.util.Arrays;
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public class Memory
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{
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private static final int MEMORY_SIZE = 0xFF; //Addressable Memory
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public static int workingRegister = 0;
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private static final int[] memory = new int[MEMORY_SIZE];
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private static final int[] bank0UniqueSpecialRegister = new int[] {0x01,0x05,0x06,0x08,0x09}; //and many more
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private static final int[] bank1UniqueSpecialRegister = new int[] {0x81,0x85,0x86,0x88,0x89}; //and many more
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public static int getRegister(int address)
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{
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if(address == 0x0)
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{
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int indirectAddress = getFSR();
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return getDataFromIndirectAddress(indirectAddress);
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}
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if(getRegisterBank() != 0)
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{
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if((Arrays.stream(bank1UniqueSpecialRegister).anyMatch(x -> x == address)))
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{
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return memory[address + 128]; //Write to correct memory address
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}
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}
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return memory[address];
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}
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public static void setRegister(int address, int data)
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{
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if(address == 0x0)
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{
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int indirectAddress = getFSR();
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setDataFromIndirectAddress(indirectAddress, data);
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return;
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}
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if(getRegisterBank() != 0)
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{
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if((Arrays.stream(bank1UniqueSpecialRegister).anyMatch(x -> x == address)))
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{
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memory[address + 128] = data; //Write to correct memory address
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return;
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}
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}
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memory[address] = data;
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}
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private static int getDataFromIndirectAddress(int address)
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{
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if((Arrays.stream(bank0UniqueSpecialRegister).anyMatch(x -> x == address)) || (Arrays.stream(bank1UniqueSpecialRegister).anyMatch(x -> x == address)))
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{
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return memory[address];
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}
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return memory[address % 128]; // else: Registers.Registers which are mapped
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}
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private static void setDataFromIndirectAddress(int address, int data)
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{
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if((Arrays.stream(bank0UniqueSpecialRegister).anyMatch(x -> x == address)) || (Arrays.stream(bank1UniqueSpecialRegister).anyMatch(x -> x == address)))
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{
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memory[address] = data;
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}
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memory[address % 128] = data; // else: Registers.Registers which are mapped
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}
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private static int getRegisterBank()
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{
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if((memory[0x03] & 0x20) == 0x0) //Check RP0 Bit of Bank0 Status Register
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{
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return 0;
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}
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return 1;
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}
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private static int getFSR()
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{
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return memory[0x4];
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}
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public static boolean getZeroBit()
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{
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return (memory[0x03] & 0x04) == 0x04;
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}
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public static void setZeroBit()
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{
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memory[0x03] |= 0x04;
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}
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public static void clearZeroBit()
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{
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memory[0x03] &= 0xFB;
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}
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public static boolean getDigitCarryBit()
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{
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return (memory[0x03] & 0x02) == 0x02;
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}
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public static void setDigitCarryBit()
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{
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memory[0x03] |= 0x02;
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}
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public static void clearDigitCarryBit()
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{
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memory[0x03] &= 0xFD;
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}
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public static boolean getCarryBit()
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{
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return (memory[0x03] & 0x01) == 0x01;
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}
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public static void setCarryBit()
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{
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memory[0x03] |= 0x01;
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}
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public static void clearCarryBit()
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{
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memory[0x03] &= 0xFE;
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}
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}
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