Compare commits
7 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
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eeb7ba121e | ||
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dbf6de1027 | ||
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324912080d | ||
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bf182815d2 | ||
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f644d929fc | ||
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3910731cae | ||
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049a16f8a6 |
@@ -13,17 +13,18 @@ class Main
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{
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{
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public static void main(String[] args) throws InterruptedException {
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public static void main(String[] args) throws InterruptedException {
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Command[] program = Parser.parser("de/darkress/pic16f84sim/TPicSim101.LST");
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Command[] program = Parser.parser("de/darkress/pic16f84sim/TestPrograms/TPicSim7.LST");
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/*for(int i = 0; i < instructions.size(); i++)
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{
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Memory.initMemory();
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program.add(CommandDecoder.decode(instructions.get(i)));
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}*/
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while(ProgramCounter.getPc() < 1024)
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while(ProgramCounter.getPc() < 1024)
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{
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{
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System.out.println("Command: " + program[ProgramCounter.getPc()].toString());
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program[ProgramCounter.getPc()].execute();
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program[ProgramCounter.getPc()].execute();
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System.out.println(Memory.workingRegister + " " + Cycles.getCycles());
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System.out.println(Memory.getPCLATH() + " " + Memory.getPCL() + "\n");
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System.out.println(Integer.toHexString(Memory.workingRegister) + " " + Cycles.getCycles());
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System.out.println(Integer.toHexString(Memory.getOption()) + " " + Integer.toHexString(Memory.getTimer()));
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System.out.println(Integer.toHexString(Memory.getPCLATH()) + " " + Integer.toHexString(Memory.getPCL()) + "\n");
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}
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}
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}
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}
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}
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}
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@@ -16,6 +16,8 @@ public class Addlw extends LiteralCommandUtils implements Command
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@Override
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@Override
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public void execute()
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public void execute()
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{
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{
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ProgramCounter.incPC();
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Cycles.incCycles();
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int result = literal + Memory.workingRegister;
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int result = literal + Memory.workingRegister;
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checkZeroBit(result);
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checkZeroBit(result);
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@@ -23,7 +25,5 @@ public class Addlw extends LiteralCommandUtils implements Command
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checkDigitCarryBit(literal);
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checkDigitCarryBit(literal);
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Memory.workingRegister = result % 256;
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Memory.workingRegister = result % 256;
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ProgramCounter.incPC();
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Cycles.addToCycles(1);
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}
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}
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}
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}
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@@ -18,6 +18,8 @@ public class Addwf extends FileRegisterCommandUtils implements Command
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@Override
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@Override
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public void execute()
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public void execute()
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{
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{
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ProgramCounter.incPC();
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Cycles.incCycles();
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int result = Memory.getRegister(address) + Memory.workingRegister;
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int result = Memory.getRegister(address) + Memory.workingRegister;
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checkZeroBit(result);
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checkZeroBit(result);
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@@ -25,7 +27,5 @@ public class Addwf extends FileRegisterCommandUtils implements Command
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checkDigitCarryBit(address);
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checkDigitCarryBit(address);
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writeToDestination(destinationBit, address, result);
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writeToDestination(destinationBit, address, result);
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ProgramCounter.incPC();
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Cycles.addToCycles(1);
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}
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}
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}
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}
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@@ -15,12 +15,12 @@ public class Andlw extends LiteralCommandUtils implements Command
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@Override
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@Override
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public void execute()
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public void execute()
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{
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{
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ProgramCounter.incPC();
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Cycles.incCycles();
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int result = literal & Memory.workingRegister;
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int result = literal & Memory.workingRegister;
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checkZeroBit(result);
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checkZeroBit(result);
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Memory.workingRegister = result % 256;
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Memory.workingRegister = result % 256;
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ProgramCounter.incPC();
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Cycles.addToCycles(1);
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}
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}
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}
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}
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@@ -18,12 +18,12 @@ public class Andwf extends FileRegisterCommandUtils implements Command
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@Override
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@Override
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public void execute()
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public void execute()
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{
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{
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ProgramCounter.incPC();
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Cycles.incCycles();
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int result = Memory.getRegister(address) & Memory.workingRegister;
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int result = Memory.getRegister(address) & Memory.workingRegister;
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checkZeroBit(result);
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checkZeroBit(result);
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writeToDestination(destinationBit, address, result);
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writeToDestination(destinationBit, address, result);
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ProgramCounter.incPC();
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Cycles.addToCycles(1);
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}
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}
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}
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}
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@@ -18,11 +18,11 @@ public class Bcf extends BitOrientedCommandUtils implements Command
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@Override
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@Override
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public void execute()
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public void execute()
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{
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{
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ProgramCounter.incPC();
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Cycles.incCycles();
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int result = Memory.getRegister(address);
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int result = Memory.getRegister(address);
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result &= ~(1 << bitPlacement); //Mask n-th bit with 0
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result &= ~(1 << bitPlacement); //Mask n-th bit with 0
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Memory.setRegister(address, result);
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Memory.setRegister(address, result);
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ProgramCounter.incPC();
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Cycles.addToCycles(1);
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}
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}
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}
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}
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@@ -18,11 +18,11 @@ public class Bsf extends BitOrientedCommandUtils implements Command
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@Override
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@Override
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public void execute()
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public void execute()
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{
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{
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ProgramCounter.incPC();
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Cycles.incCycles();
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int result = Memory.getRegister(address);
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int result = Memory.getRegister(address);
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result |= (1 << bitPlacement);
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result |= (1 << bitPlacement);
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Memory.setRegister(address, result);
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Memory.setRegister(address, result);
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ProgramCounter.incPC();
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Cycles.addToCycles(1);
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}
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}
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}
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}
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@@ -18,15 +18,14 @@ public class Btfsc extends BitOrientedCommandUtils implements Command
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@Override
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@Override
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public void execute()
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public void execute()
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{
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{
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ProgramCounter.incPC();
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Cycles.incCycles();
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int result = Memory.getRegister(address);
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int result = Memory.getRegister(address);
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if((result & (1 << bitPlacement)) == 0) //Test if bit is clear
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if((result & (1 << bitPlacement)) == 0) //Test if bit is clear
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{
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{
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ProgramCounter.incPC();
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Nop nop = new Nop();
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Cycles.addToCycles(1);
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nop.execute();
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}
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}
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ProgramCounter.incPC();
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Cycles.addToCycles(1);
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}
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}
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}
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}
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@@ -18,15 +18,14 @@ public class Btfss extends BitOrientedCommandUtils implements Command
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@Override
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@Override
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public void execute()
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public void execute()
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{
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{
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ProgramCounter.incPC();
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Cycles.incCycles();
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int result = Memory.getRegister(address);
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int result = Memory.getRegister(address);
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if((result & (1 << bitPlacement)) > 0) //Test if bit is set
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if((result & (1 << bitPlacement)) > 0) //Test if bit is set
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{
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{
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ProgramCounter.incPC();
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Nop nop = new Nop();
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Cycles.addToCycles(1);
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nop.execute();
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}
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}
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ProgramCounter.incPC();
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Cycles.addToCycles(1);
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}
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}
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}
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}
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@@ -16,8 +16,9 @@ public class Call extends LiteralCommandUtils implements Command
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@Override
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@Override
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public void execute()
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public void execute()
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{
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{
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Cycles.incCycles();
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Stack.push(ProgramCounter.getPc() + 1);
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Stack.push(ProgramCounter.getPc() + 1);
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ProgramCounter.setPcFrom11BitLiteral(literal);
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ProgramCounter.setPcFrom11BitLiteral(literal);
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Cycles.addToCycles(2);
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Cycles.incCycles(); //Simulate nop and 2-Cycle instruction
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}
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}
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}
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}
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@@ -1,7 +1,6 @@
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package de.darkress.pic16f84sim.commands;
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package de.darkress.pic16f84sim.commands;
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import de.darkress.pic16f84sim.microcontroller.Cycles;
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import de.darkress.pic16f84sim.microcontroller.Cycles;
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import de.darkress.pic16f84sim.microcontroller.Memory;
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import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
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import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
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public class Clrf extends FileRegisterCommandUtils implements Command
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public class Clrf extends FileRegisterCommandUtils implements Command
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@@ -18,12 +17,12 @@ public class Clrf extends FileRegisterCommandUtils implements Command
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@Override
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@Override
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public void execute()
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public void execute()
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{
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{
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ProgramCounter.incPC();
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Cycles.incCycles();
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final int result = 0;
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final int result = 0;
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checkZeroBit(result);
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checkZeroBit(result);
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writeToDestination(destinationBit, address, result);
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writeToDestination(destinationBit, address, result);
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ProgramCounter.incPC();
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Cycles.addToCycles(1);
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}
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}
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}
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}
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@@ -9,12 +9,12 @@ public class Clrw extends FileRegisterCommandUtils implements Command
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@Override
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@Override
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public void execute()
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public void execute()
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{
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{
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ProgramCounter.incPC();
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Cycles.incCycles();
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final int result = 0;
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final int result = 0;
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checkZeroBit(result);
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checkZeroBit(result);
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Memory.workingRegister = result;
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Memory.workingRegister = result;
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ProgramCounter.incPC();
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Cycles.addToCycles(1);
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}
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}
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}
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}
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@@ -18,12 +18,12 @@ public class Comf extends FileRegisterCommandUtils implements Command
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@Override
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@Override
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public void execute()
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public void execute()
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{
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{
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ProgramCounter.incPC();
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Cycles.incCycles();
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int result = 255 - Memory.getRegister(address); // Get inverse of 8Bit value
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int result = 255 - Memory.getRegister(address); // Get inverse of 8Bit value
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checkZeroBit(result);
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checkZeroBit(result);
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writeToDestination(destinationBit, address, result);
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writeToDestination(destinationBit, address, result);
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ProgramCounter.incPC();
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Cycles.addToCycles(1);
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}
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}
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}
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}
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@@ -18,12 +18,12 @@ public class Decf extends FileRegisterCommandUtils implements Command
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@Override
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@Override
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public void execute()
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public void execute()
|
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{
|
{
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|
ProgramCounter.incPC();
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Cycles.incCycles();
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int result = Memory.getRegister(address) + 255; // Allow underflow
|
int result = Memory.getRegister(address) + 255; // Allow underflow
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|
|
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checkZeroBit(result);
|
checkZeroBit(result);
|
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writeToDestination(destinationBit, address, result % 256); // Catch underflow
|
writeToDestination(destinationBit, address, result % 256); // Catch underflow
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ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
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||||||
}
|
}
|
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|
|||||||
@@ -18,6 +18,8 @@ public class Decfsz extends FileRegisterCommandUtils implements Command
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@Override
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@Override
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||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
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||||||
|
ProgramCounter.incPC();
|
||||||
|
Cycles.incCycles();
|
||||||
int result = Memory.getRegister(address) + 255; // Allow underflow
|
int result = Memory.getRegister(address) + 255; // Allow underflow
|
||||||
|
|
||||||
checkZeroBit(result);
|
checkZeroBit(result);
|
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@@ -26,10 +28,8 @@ public class Decfsz extends FileRegisterCommandUtils implements Command
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|
|
||||||
if((result % 256) == 0)
|
if((result % 256) == 0)
|
||||||
{
|
{
|
||||||
ProgramCounter.incPC();
|
Nop nop = new Nop();
|
||||||
Cycles.addToCycles(1);
|
nop.execute();
|
||||||
}
|
}
|
||||||
ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
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@@ -15,7 +15,8 @@ public class Goto extends LiteralCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
Cycles.incCycles();
|
||||||
ProgramCounter.setPcFrom11BitLiteral(literal);
|
ProgramCounter.setPcFrom11BitLiteral(literal);
|
||||||
Cycles.addToCycles(2);
|
Cycles.incCycles();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -18,12 +18,12 @@ public class Incf extends FileRegisterCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
ProgramCounter.incPC();
|
||||||
|
Cycles.incCycles();
|
||||||
int result = Memory.getRegister(address) + 1; // Allow underflow
|
int result = Memory.getRegister(address) + 1; // Allow underflow
|
||||||
|
|
||||||
checkZeroBit(result);
|
checkZeroBit(result);
|
||||||
|
|
||||||
writeToDestination(destinationBit, address, result % 256); // Catch underflow
|
writeToDestination(destinationBit, address, result % 256); // Catch underflow
|
||||||
ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -18,6 +18,8 @@ public class Incfsz extends FileRegisterCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
ProgramCounter.incPC();
|
||||||
|
Cycles.incCycles();
|
||||||
int result = Memory.getRegister(address) + 1;
|
int result = Memory.getRegister(address) + 1;
|
||||||
|
|
||||||
checkZeroBit(result);
|
checkZeroBit(result);
|
||||||
@@ -26,10 +28,8 @@ public class Incfsz extends FileRegisterCommandUtils implements Command
|
|||||||
|
|
||||||
if((result % 256) == 0)
|
if((result % 256) == 0)
|
||||||
{
|
{
|
||||||
ProgramCounter.incPC();
|
Nop nop = new Nop();
|
||||||
Cycles.addToCycles(1);
|
nop.execute();
|
||||||
}
|
}
|
||||||
ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -15,12 +15,12 @@ public class Iorlw extends LiteralCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
ProgramCounter.incPC();
|
||||||
|
Cycles.incCycles();
|
||||||
int result = literal | Memory.workingRegister;
|
int result = literal | Memory.workingRegister;
|
||||||
|
|
||||||
checkZeroBit(result);
|
checkZeroBit(result);
|
||||||
|
|
||||||
Memory.workingRegister = result % 256;
|
Memory.workingRegister = result % 256;
|
||||||
ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -18,12 +18,12 @@ public class Iorwf extends FileRegisterCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
ProgramCounter.incPC();
|
||||||
|
Cycles.incCycles();
|
||||||
int result = Memory.getRegister(address) | Memory.workingRegister;
|
int result = Memory.getRegister(address) | Memory.workingRegister;
|
||||||
|
|
||||||
checkZeroBit(result);
|
checkZeroBit(result);
|
||||||
|
|
||||||
writeToDestination(destinationBit, address, result);
|
writeToDestination(destinationBit, address, result);
|
||||||
ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -18,12 +18,12 @@ public class Movf extends FileRegisterCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
ProgramCounter.incPC();
|
||||||
|
Cycles.incCycles();
|
||||||
int result = Memory.getRegister(address);
|
int result = Memory.getRegister(address);
|
||||||
|
|
||||||
checkZeroBit(result);
|
checkZeroBit(result);
|
||||||
|
|
||||||
writeToDestination(destinationBit, address, result);
|
writeToDestination(destinationBit, address, result);
|
||||||
ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -16,8 +16,8 @@ public class Movlw extends LiteralCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
Memory.workingRegister = literal;
|
|
||||||
ProgramCounter.incPC();
|
ProgramCounter.incPC();
|
||||||
Cycles.addToCycles(1);
|
Cycles.incCycles();
|
||||||
|
Memory.workingRegister = literal;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -18,10 +18,10 @@ public class Movwf extends FileRegisterCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
ProgramCounter.incPC();
|
||||||
|
Cycles.incCycles();
|
||||||
int result = Memory.workingRegister;
|
int result = Memory.workingRegister;
|
||||||
|
|
||||||
writeToDestination(destinationBit, address, result);
|
writeToDestination(destinationBit, address, result);
|
||||||
ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -11,6 +11,6 @@ public class Nop extends LiteralCommandUtils implements Command
|
|||||||
{
|
{
|
||||||
// Do nothing, just increment the PC
|
// Do nothing, just increment the PC
|
||||||
ProgramCounter.incPC();
|
ProgramCounter.incPC();
|
||||||
Cycles.addToCycles(1);
|
Cycles.incCycles();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -17,8 +17,9 @@ public class Retlw extends LiteralCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
Cycles.incCycles();
|
||||||
Memory.workingRegister = literal;
|
Memory.workingRegister = literal;
|
||||||
ProgramCounter.setPcFromStack(Stack.pop());
|
ProgramCounter.setPcFromStack(Stack.pop());
|
||||||
Cycles.addToCycles(2);
|
Cycles.incCycles(); // Simulate 2-Cycle Instruction
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -9,7 +9,8 @@ public class Return extends LiteralCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
Cycles.incCycles();
|
||||||
ProgramCounter.setPcFromStack(Stack.pop());
|
ProgramCounter.setPcFromStack(Stack.pop());
|
||||||
Cycles.addToCycles(2);
|
Cycles.incCycles(); // Simulate 2-Cycle Instruction
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -18,6 +18,8 @@ public class Rlf extends FileRegisterCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
ProgramCounter.incPC();
|
||||||
|
Cycles.incCycles();
|
||||||
int register = Memory.getRegister(address);
|
int register = Memory.getRegister(address);
|
||||||
int newCarry = register >>7;
|
int newCarry = register >>7;
|
||||||
int oldCarry = Memory.getCarryBit();
|
int oldCarry = Memory.getCarryBit();
|
||||||
@@ -31,7 +33,5 @@ public class Rlf extends FileRegisterCommandUtils implements Command
|
|||||||
}
|
}
|
||||||
|
|
||||||
writeToDestination(destinationBit, address, register);
|
writeToDestination(destinationBit, address, register);
|
||||||
ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -18,6 +18,8 @@ public class Rrf extends FileRegisterCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
ProgramCounter.incPC();
|
||||||
|
Cycles.incCycles();
|
||||||
int register = Memory.getRegister(address);
|
int register = Memory.getRegister(address);
|
||||||
int newCarry = register & 0x01;
|
int newCarry = register & 0x01;
|
||||||
int oldCarry = Memory.getCarryBit();
|
int oldCarry = Memory.getCarryBit();
|
||||||
@@ -31,7 +33,5 @@ public class Rrf extends FileRegisterCommandUtils implements Command
|
|||||||
}
|
}
|
||||||
|
|
||||||
writeToDestination(destinationBit, address, register);
|
writeToDestination(destinationBit, address, register);
|
||||||
ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -36,6 +36,8 @@ public class Sublw extends LiteralCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
ProgramCounter.incPC();
|
||||||
|
Cycles.incCycles();
|
||||||
int result = literal - Memory.workingRegister + 256;
|
int result = literal - Memory.workingRegister + 256;
|
||||||
|
|
||||||
checkZeroBit(result);
|
checkZeroBit(result);
|
||||||
@@ -43,7 +45,5 @@ public class Sublw extends LiteralCommandUtils implements Command
|
|||||||
checkDigitCarryBit(literal);
|
checkDigitCarryBit(literal);
|
||||||
|
|
||||||
Memory.workingRegister = result % 256;
|
Memory.workingRegister = result % 256;
|
||||||
ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -38,6 +38,8 @@ public class Subwf extends FileRegisterCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
ProgramCounter.incPC();
|
||||||
|
Cycles.incCycles();
|
||||||
int result = Memory.getRegister(address) - Memory.workingRegister + 256;
|
int result = Memory.getRegister(address) - Memory.workingRegister + 256;
|
||||||
|
|
||||||
checkZeroBit(result);
|
checkZeroBit(result);
|
||||||
@@ -45,7 +47,5 @@ public class Subwf extends FileRegisterCommandUtils implements Command
|
|||||||
checkDigitCarryBit(Memory.getRegister(address));
|
checkDigitCarryBit(Memory.getRegister(address));
|
||||||
|
|
||||||
writeToDestination(destinationBit, address, result % 256);
|
writeToDestination(destinationBit, address, result % 256);
|
||||||
ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -18,12 +18,12 @@ public class Swapf extends FileRegisterCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
ProgramCounter.incPC();
|
||||||
|
Cycles.incCycles();
|
||||||
int result = (Memory.getRegister(address) <<4) & 0xF0;
|
int result = (Memory.getRegister(address) <<4) & 0xF0;
|
||||||
int tmp = Memory.getRegister(address) >>4;
|
int tmp = Memory.getRegister(address) >>4;
|
||||||
result += tmp;
|
result += tmp;
|
||||||
|
|
||||||
writeToDestination(destinationBit, address, result);
|
writeToDestination(destinationBit, address, result);
|
||||||
ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -15,12 +15,12 @@ public class Xorlw extends LiteralCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
ProgramCounter.incPC();
|
||||||
|
Cycles.incCycles();
|
||||||
int result = literal ^ Memory.workingRegister;
|
int result = literal ^ Memory.workingRegister;
|
||||||
|
|
||||||
checkZeroBit(result);
|
checkZeroBit(result);
|
||||||
|
|
||||||
Memory.workingRegister = result % 256;
|
Memory.workingRegister = result % 256;
|
||||||
ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -18,12 +18,12 @@ public class Xorwf extends FileRegisterCommandUtils implements Command
|
|||||||
@Override
|
@Override
|
||||||
public void execute()
|
public void execute()
|
||||||
{
|
{
|
||||||
|
ProgramCounter.incPC();
|
||||||
|
Cycles.incCycles();
|
||||||
int result = Memory.getRegister(address) ^ Memory.workingRegister;
|
int result = Memory.getRegister(address) ^ Memory.workingRegister;
|
||||||
|
|
||||||
checkZeroBit(result);
|
checkZeroBit(result);
|
||||||
|
|
||||||
writeToDestination(destinationBit, address, result);
|
writeToDestination(destinationBit, address, result);
|
||||||
ProgramCounter.incPC();
|
|
||||||
Cycles.addToCycles(1);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -3,9 +3,10 @@ package de.darkress.pic16f84sim.microcontroller;
|
|||||||
public class Cycles {
|
public class Cycles {
|
||||||
private static int cycles = 0;
|
private static int cycles = 0;
|
||||||
|
|
||||||
public static void addToCycles(int increase)
|
public static void incCycles()
|
||||||
{
|
{
|
||||||
cycles += increase;
|
Timer.increaseTimer();
|
||||||
|
cycles++;
|
||||||
}
|
}
|
||||||
|
|
||||||
public static int getCycles() {
|
public static int getCycles() {
|
||||||
|
|||||||
@@ -4,6 +4,13 @@ import java.util.Arrays;
|
|||||||
|
|
||||||
public class Memory
|
public class Memory
|
||||||
{
|
{
|
||||||
|
public static void initMemory()
|
||||||
|
{
|
||||||
|
Memory.memory[0x81] = 0xFF; //Option
|
||||||
|
Memory.memory[0x85] = 0x1F; //TrisA
|
||||||
|
Memory.memory[0x86] = 0xFF; //TrisB
|
||||||
|
Memory.setRegister(0x03, 0x18); //Status
|
||||||
|
}
|
||||||
private static final int MEMORY_SIZE = 0xFF; //Addressable Memory
|
private static final int MEMORY_SIZE = 0xFF; //Addressable Memory
|
||||||
public static int workingRegister = 0;
|
public static int workingRegister = 0;
|
||||||
private static final int[] memory = new int[MEMORY_SIZE];
|
private static final int[] memory = new int[MEMORY_SIZE];
|
||||||
@@ -47,12 +54,19 @@ public class Memory
|
|||||||
setDataFromIndirectAddress(indirectAddress, data);
|
setDataFromIndirectAddress(indirectAddress, data);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
if(address == 0x01) //Reset PrescalerCounter if change on Option or Timer Register
|
||||||
|
{
|
||||||
|
Timer.resetTimeToTimerIncrease();
|
||||||
|
Timer.setCyclesToTimerIncrease(Timer.getCyclesToTimerIncrease() - 1); //Decrease by one to account for
|
||||||
|
// this command execution
|
||||||
|
}
|
||||||
if((Arrays.stream(bank0UniqueSpecialRegister).anyMatch(x -> x == address)) && getRegisterBank() == 0)
|
if((Arrays.stream(bank0UniqueSpecialRegister).anyMatch(x -> x == address)) && getRegisterBank() == 0)
|
||||||
{
|
{
|
||||||
memory[address] = data;
|
memory[address] = data;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
if((Arrays.stream(bank1UniqueSpecialRegister).anyMatch(x -> x == address)) && getRegisterBank() == 1)
|
if((Arrays.stream(bank0UniqueSpecialRegister).anyMatch(x -> x == address)) && getRegisterBank() == 1) //bank0
|
||||||
|
// because of 7 Bit address
|
||||||
{
|
{
|
||||||
memory[address + 128] = data;
|
memory[address + 128] = data;
|
||||||
return;
|
return;
|
||||||
@@ -72,6 +86,12 @@ public class Memory
|
|||||||
|
|
||||||
private static void setDataFromIndirectAddress(int address, int data)
|
private static void setDataFromIndirectAddress(int address, int data)
|
||||||
{
|
{
|
||||||
|
if(address == 0x81 || address == 0x01) //Reset PrescalerCounter if change on Option or Timer Register
|
||||||
|
{
|
||||||
|
Timer.resetTimeToTimerIncrease();
|
||||||
|
Timer.setCyclesToTimerIncrease(Timer.getCyclesToTimerIncrease() - 1); //Decrease by one to account for
|
||||||
|
// this command execution
|
||||||
|
}
|
||||||
if((Arrays.stream(bank0UniqueSpecialRegister).anyMatch(x -> x == address)) || (Arrays.stream(bank1UniqueSpecialRegister).anyMatch(x -> x == address)))
|
if((Arrays.stream(bank0UniqueSpecialRegister).anyMatch(x -> x == address)) || (Arrays.stream(bank1UniqueSpecialRegister).anyMatch(x -> x == address)))
|
||||||
{
|
{
|
||||||
memory[address] = data;
|
memory[address] = data;
|
||||||
@@ -79,10 +99,6 @@ public class Memory
|
|||||||
}
|
}
|
||||||
memory[address % 128] = data; // else: Registers.Registers which are mapped
|
memory[address % 128] = data; // else: Registers.Registers which are mapped
|
||||||
memory[address % 128 + 128] = data; //Ensure data is written to both banks to simulate mapping
|
memory[address % 128 + 128] = data; //Ensure data is written to both banks to simulate mapping
|
||||||
if(address == 0x2) //Check if PCL is destination
|
|
||||||
{
|
|
||||||
ProgramCounter.loadPc();
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
private static int getRegisterBank()
|
private static int getRegisterBank()
|
||||||
@@ -121,6 +137,21 @@ public class Memory
|
|||||||
memory[0x8A] = data & 0x1F;
|
memory[0x8A] = data & 0x1F;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
public static int getOption()
|
||||||
|
{
|
||||||
|
return memory[0x81];
|
||||||
|
}
|
||||||
|
|
||||||
|
public static int getTimer()
|
||||||
|
{
|
||||||
|
return memory[0x01];
|
||||||
|
}
|
||||||
|
|
||||||
|
public static void setTimer(int data)
|
||||||
|
{
|
||||||
|
memory[0x01] = data;
|
||||||
|
}
|
||||||
|
|
||||||
public static boolean getZeroBit()
|
public static boolean getZeroBit()
|
||||||
{
|
{
|
||||||
return (memory[0x03] & 0x04) == 0x04;
|
return (memory[0x03] & 0x04) == 0x04;
|
||||||
|
|||||||
66
de/darkress/pic16f84sim/microcontroller/Timer.java
Normal file
66
de/darkress/pic16f84sim/microcontroller/Timer.java
Normal file
@@ -0,0 +1,66 @@
|
|||||||
|
package de.darkress.pic16f84sim.microcontroller;
|
||||||
|
|
||||||
|
public class Timer
|
||||||
|
{
|
||||||
|
public static int getCyclesToTimerIncrease()
|
||||||
|
{
|
||||||
|
return cyclesToTimerIncrease;
|
||||||
|
}
|
||||||
|
|
||||||
|
public static void setCyclesToTimerIncrease(int cyclesToTimerIncrease)
|
||||||
|
{
|
||||||
|
Timer.cyclesToTimerIncrease = cyclesToTimerIncrease;
|
||||||
|
}
|
||||||
|
|
||||||
|
private static int cyclesToTimerIncrease = 1;
|
||||||
|
|
||||||
|
private static boolean timerEnabled()
|
||||||
|
{
|
||||||
|
return (Memory.getOption() & 0x20) != 0x20;
|
||||||
|
}
|
||||||
|
|
||||||
|
public static void resetTimeToTimerIncrease()
|
||||||
|
{
|
||||||
|
cyclesToTimerIncrease = getPrescalerFactor();
|
||||||
|
}
|
||||||
|
|
||||||
|
private static boolean getPrescalerAsssignment() {
|
||||||
|
return (Memory.getOption() & 0x08) == 0x08;
|
||||||
|
}
|
||||||
|
|
||||||
|
private static int getPrescalerFactor() {
|
||||||
|
final int MULTIPLIER = 2;
|
||||||
|
int prescalerPower = Memory.getOption() & 0x07;
|
||||||
|
int prescaler = (int)Math.pow(2, prescalerPower);
|
||||||
|
if(!getPrescalerAsssignment())
|
||||||
|
{
|
||||||
|
return prescaler * MULTIPLIER;
|
||||||
|
}
|
||||||
|
return prescaler;
|
||||||
|
}
|
||||||
|
|
||||||
|
private static void increaseTimerRegister()
|
||||||
|
{
|
||||||
|
int timerRegister = Memory.getRegister(0x01);
|
||||||
|
timerRegister = (timerRegister + 1) % 256;
|
||||||
|
if(timerRegister == 0) //check for timer Overflow --> interrupt
|
||||||
|
{
|
||||||
|
System.out.println("Timer Overflow");
|
||||||
|
}
|
||||||
|
Memory.setTimer(timerRegister);
|
||||||
|
}
|
||||||
|
|
||||||
|
public static void increaseTimer()
|
||||||
|
{
|
||||||
|
if(!timerEnabled())
|
||||||
|
{
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
cyclesToTimerIncrease--;
|
||||||
|
if(cyclesToTimerIncrease == 0)
|
||||||
|
{
|
||||||
|
resetTimeToTimerIncrease();
|
||||||
|
increaseTimerRegister();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
Reference in New Issue
Block a user