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10 Commits

Author SHA1 Message Date
Darkress
bc53450507 Removed comments 2023-06-18 19:25:30 +02:00
Darkress
791201c884 timer0 Interrupt fully working 2023-06-18 19:24:40 +02:00
Darkress
60b288a762 Somewhat working Timer0Interrupt 2023-06-18 19:13:37 +02:00
Darkress
101c6ec464 removed unneccessary imports 2023-06-18 18:00:09 +02:00
darkress
4e5f53d46d Pinout in binary (#36)
Co-authored-by: Darkress <30271678+DarkressX@users.noreply.github.com>
Reviewed-on: darkress/pic16f84-sim#36
2023-06-17 23:49:11 +02:00
darkress
72c377823e Basic read-only cli (#35)
Co-authored-by: Darkress <30271678+DarkressX@users.noreply.github.com>
Reviewed-on: darkress/pic16f84-sim#35
2023-06-17 23:34:59 +02:00
darkress
b408b10cd0 implemented Clrwdt Instruction (#34)
Co-authored-by: Darkress <30271678+DarkressX@users.noreply.github.com>
Reviewed-on: darkress/pic16f84-sim#34
2023-06-17 22:52:03 +02:00
darkress
9f2a814c34 watchdog (#33)
Co-authored-by: Darkress <30271678+DarkressX@users.noreply.github.com>
Reviewed-on: darkress/pic16f84-sim#33
2023-06-17 20:43:30 +02:00
darkress
f2423d0d71 timer0 (#32)
Co-authored-by: Darkress <30271678+DarkressX@users.noreply.github.com>
Reviewed-on: darkress/pic16f84-sim#32
2023-06-17 18:45:24 +02:00
darkress
049a16f8a6 parser now acounts for instruction address (#31)
Co-authored-by: darkress <30271678+DarkressX@users.noreply.github.com>
Reviewed-on: darkress/pic16f84-sim#31
2023-06-12 16:14:04 +02:00
44 changed files with 357 additions and 96 deletions

View File

@@ -1,29 +1,30 @@
package de.darkress.pic16f84sim;
import de.darkress.pic16f84sim.cli.Cli;
import de.darkress.pic16f84sim.commands.Command;
import de.darkress.pic16f84sim.decoder.CommandDecoder;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
import de.darkress.pic16f84sim.microcontroller.Watchdog;
import de.darkress.pic16f84sim.parser.Parser;
import java.util.concurrent.TimeUnit;
class Main
{
public static void main(String[] args) throws InterruptedException {
public static void main(String[] args) {
Command[] program = Parser.parser("de/darkress/pic16f84sim/TPicSim101.LST");
/*for(int i = 0; i < instructions.size(); i++)
{
program.add(CommandDecoder.decode(instructions.get(i)));
}*/
Command[] program = Parser.parser("de/darkress/pic16f84sim/TestPrograms/TPicSim8.LST");
Memory.initMemory();
while(ProgramCounter.getPc() < 1024)
{
if((Memory.getRegister(0x03) & 0x10) == 0x00) { // Checking WDT in Status Register
System.out.println("Resetting device");
Watchdog.resetProgram();
}
String[] instructionName = program[ProgramCounter.getPc()].getClass().toString().split("\\.");
System.out.println("Command: " + instructionName[instructionName.length -1]);
program[ProgramCounter.getPc()].execute();
System.out.println(Memory.workingRegister + " " + Cycles.getCycles());
System.out.println(Memory.getPCLATH() + " " + Memory.getPCL() + "\n");
Cli.showRegisters();
}
}
}

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@@ -0,0 +1,41 @@
package de.darkress.pic16f84sim.cli;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.Stack;
import de.darkress.pic16f84sim.microcontroller.Timer;
public class Cli
{
public static void showRegisters() {
printf(Memory.workingRegister, "W-Reg", true);
printf(Cycles.getCycles(), "Cycles", false);
System.out.printf("%n");
printf(Memory.getRegister(0x03), "Status", true);
printf(Memory.getOption(), "Option", true);
System.out.printf("%n");
printf(Memory.getFSR(), "FSR", true);
printf(Stack.getStackPointer(), "Stackpointer", true);
System.out.printf("%n");
printf(Memory.getTimer(), "Timer", true);
printf(Timer.getCyclesToTimerIncrease(), "Prescaler", true);
System.out.printf("%n");
printf(Memory.getPCLATH(), "PCLATH", true);
printf(Memory.getPCL(), "PCL", true);
System.out.printf("%n");
System.out.printf("%s:\t\t%s\t", "PortA", Integer.toBinaryString(Memory.getPortA()));
System.out.printf("%s:\t\t%s\t", "PortB", Integer.toBinaryString(Memory.getPortB()));
System.out.printf("%n");
printf(Memory.getRegister(0x0B), "IntCon", true);
System.out.printf("%n");
}
private static void printf(int value, String description, boolean hex) {
if(hex) {
System.out.printf("%s:\t\t%s\t", description, Integer.toHexString(value));
} else {
System.out.printf("%s:\t\t%d\t", description, value);
}
}
}

View File

@@ -16,6 +16,8 @@ public class Addlw extends LiteralCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = literal + Memory.workingRegister;
checkZeroBit(result);
@@ -23,7 +25,5 @@ public class Addlw extends LiteralCommandUtils implements Command
checkDigitCarryBit(literal);
Memory.workingRegister = result % 256;
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -18,6 +18,8 @@ public class Addwf extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.getRegister(address) + Memory.workingRegister;
checkZeroBit(result);
@@ -25,7 +27,5 @@ public class Addwf extends FileRegisterCommandUtils implements Command
checkDigitCarryBit(address);
writeToDestination(destinationBit, address, result);
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -15,12 +15,12 @@ public class Andlw extends LiteralCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = literal & Memory.workingRegister;
checkZeroBit(result);
Memory.workingRegister = result % 256;
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -18,12 +18,12 @@ public class Andwf extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.getRegister(address) & Memory.workingRegister;
checkZeroBit(result);
writeToDestination(destinationBit, address, result);
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -18,11 +18,11 @@ public class Bcf extends BitOrientedCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.getRegister(address);
result &= ~(1 << bitPlacement); //Mask n-th bit with 0
Memory.setRegister(address, result);
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -18,11 +18,11 @@ public class Bsf extends BitOrientedCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.getRegister(address);
result |= (1 << bitPlacement);
Memory.setRegister(address, result);
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -18,15 +18,14 @@ public class Btfsc extends BitOrientedCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.getRegister(address);
if((result & (1 << bitPlacement)) == 0) //Test if bit is clear
{
ProgramCounter.incPC();
Cycles.addToCycles(1);
Nop nop = new Nop();
nop.execute();
}
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -18,15 +18,14 @@ public class Btfss extends BitOrientedCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.getRegister(address);
if((result & (1 << bitPlacement)) > 0) //Test if bit is set
{
ProgramCounter.incPC();
Cycles.addToCycles(1);
Nop nop = new Nop();
nop.execute();
}
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -16,8 +16,9 @@ public class Call extends LiteralCommandUtils implements Command
@Override
public void execute()
{
Cycles.incCycles();
Stack.push(ProgramCounter.getPc() + 1);
ProgramCounter.setPcFrom11BitLiteral(literal);
Cycles.addToCycles(2);
Cycles.incCycles(); //Simulate nop and 2-Cycle instruction
}
}

View File

@@ -1,7 +1,6 @@
package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
public class Clrf extends FileRegisterCommandUtils implements Command
@@ -18,12 +17,12 @@ public class Clrf extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
final int result = 0;
checkZeroBit(result);
writeToDestination(destinationBit, address, result);
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -9,12 +9,12 @@ public class Clrw extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
final int result = 0;
checkZeroBit(result);
Memory.workingRegister = result;
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -0,0 +1,24 @@
package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.*;
public class Clrwdt extends LiteralCommandUtils implements Command
{
public Clrwdt()
{
}
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
Memory.setRegister(0x03, Memory.getRegister(0x03) | 0x18);
if(Timer.getPrescalerAssignment()) {
Timer.resetTimeToTimerIncrease();
Watchdog.resetWatchdogTimer();
}
}
}

View File

@@ -18,12 +18,12 @@ public class Comf extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = 255 - Memory.getRegister(address); // Get inverse of 8Bit value
checkZeroBit(result);
writeToDestination(destinationBit, address, result);
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -18,12 +18,12 @@ public class Decf extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.getRegister(address) + 255; // Allow underflow
checkZeroBit(result);
writeToDestination(destinationBit, address, result % 256); // Catch underflow
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -18,6 +18,8 @@ public class Decfsz extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.getRegister(address) + 255; // Allow underflow
checkZeroBit(result);
@@ -26,10 +28,8 @@ public class Decfsz extends FileRegisterCommandUtils implements Command
if((result % 256) == 0)
{
ProgramCounter.incPC();
Cycles.addToCycles(1);
Nop nop = new Nop();
nop.execute();
}
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -15,7 +15,8 @@ public class Goto extends LiteralCommandUtils implements Command
@Override
public void execute()
{
Cycles.incCycles();
ProgramCounter.setPcFrom11BitLiteral(literal);
Cycles.addToCycles(2);
Cycles.incCycles();
}
}

View File

@@ -18,12 +18,12 @@ public class Incf extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.getRegister(address) + 1; // Allow underflow
checkZeroBit(result);
writeToDestination(destinationBit, address, result % 256); // Catch underflow
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -18,6 +18,8 @@ public class Incfsz extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.getRegister(address) + 1;
checkZeroBit(result);
@@ -26,10 +28,8 @@ public class Incfsz extends FileRegisterCommandUtils implements Command
if((result % 256) == 0)
{
ProgramCounter.incPC();
Cycles.addToCycles(1);
Nop nop = new Nop();
nop.execute();
}
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -15,12 +15,12 @@ public class Iorlw extends LiteralCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = literal | Memory.workingRegister;
checkZeroBit(result);
Memory.workingRegister = result % 256;
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -18,12 +18,12 @@ public class Iorwf extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.getRegister(address) | Memory.workingRegister;
checkZeroBit(result);
writeToDestination(destinationBit, address, result);
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -18,12 +18,12 @@ public class Movf extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.getRegister(address);
checkZeroBit(result);
writeToDestination(destinationBit, address, result);
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -16,8 +16,8 @@ public class Movlw extends LiteralCommandUtils implements Command
@Override
public void execute()
{
Memory.workingRegister = literal;
ProgramCounter.incPC();
Cycles.addToCycles(1);
Cycles.incCycles();
Memory.workingRegister = literal;
}
}

View File

@@ -18,10 +18,10 @@ public class Movwf extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.workingRegister;
writeToDestination(destinationBit, address, result);
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -11,6 +11,6 @@ public class Nop extends LiteralCommandUtils implements Command
{
// Do nothing, just increment the PC
ProgramCounter.incPC();
Cycles.addToCycles(1);
Cycles.incCycles();
}
}

View File

@@ -0,0 +1,18 @@
package de.darkress.pic16f84sim.commands;
import de.darkress.pic16f84sim.microcontroller.Cycles;
import de.darkress.pic16f84sim.microcontroller.Memory;
import de.darkress.pic16f84sim.microcontroller.ProgramCounter;
import de.darkress.pic16f84sim.microcontroller.Stack;
public class Retfie extends LiteralCommandUtils implements Command
{
@Override
public void execute()
{
Cycles.incCycles();
Memory.setRegister(0x0B, Memory.getRegister(0x0B) | 0x80); //Set GIE
ProgramCounter.setPcFromStack(Stack.pop() + 1);
Cycles.incCycles(); // Simulate 2-Cycle Instruction
}
}

View File

@@ -17,8 +17,9 @@ public class Retlw extends LiteralCommandUtils implements Command
@Override
public void execute()
{
Cycles.incCycles();
Memory.workingRegister = literal;
ProgramCounter.setPcFromStack(Stack.pop());
Cycles.addToCycles(2);
Cycles.incCycles(); // Simulate 2-Cycle Instruction
}
}

View File

@@ -9,7 +9,8 @@ public class Return extends LiteralCommandUtils implements Command
@Override
public void execute()
{
Cycles.incCycles();
ProgramCounter.setPcFromStack(Stack.pop());
Cycles.addToCycles(2);
Cycles.incCycles(); // Simulate 2-Cycle Instruction
}
}

View File

@@ -18,6 +18,8 @@ public class Rlf extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int register = Memory.getRegister(address);
int newCarry = register >>7;
int oldCarry = Memory.getCarryBit();
@@ -31,7 +33,5 @@ public class Rlf extends FileRegisterCommandUtils implements Command
}
writeToDestination(destinationBit, address, register);
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -18,6 +18,8 @@ public class Rrf extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int register = Memory.getRegister(address);
int newCarry = register & 0x01;
int oldCarry = Memory.getCarryBit();
@@ -31,7 +33,5 @@ public class Rrf extends FileRegisterCommandUtils implements Command
}
writeToDestination(destinationBit, address, register);
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -36,6 +36,8 @@ public class Sublw extends LiteralCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = literal - Memory.workingRegister + 256;
checkZeroBit(result);
@@ -43,7 +45,5 @@ public class Sublw extends LiteralCommandUtils implements Command
checkDigitCarryBit(literal);
Memory.workingRegister = result % 256;
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -38,6 +38,8 @@ public class Subwf extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.getRegister(address) - Memory.workingRegister + 256;
checkZeroBit(result);
@@ -45,7 +47,5 @@ public class Subwf extends FileRegisterCommandUtils implements Command
checkDigitCarryBit(Memory.getRegister(address));
writeToDestination(destinationBit, address, result % 256);
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -18,12 +18,12 @@ public class Swapf extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = (Memory.getRegister(address) <<4) & 0xF0;
int tmp = Memory.getRegister(address) >>4;
result += tmp;
writeToDestination(destinationBit, address, result);
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -15,12 +15,12 @@ public class Xorlw extends LiteralCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = literal ^ Memory.workingRegister;
checkZeroBit(result);
Memory.workingRegister = result % 256;
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -18,12 +18,12 @@ public class Xorwf extends FileRegisterCommandUtils implements Command
@Override
public void execute()
{
ProgramCounter.incPC();
Cycles.incCycles();
int result = Memory.getRegister(address) ^ Memory.workingRegister;
checkZeroBit(result);
writeToDestination(destinationBit, address, result);
ProgramCounter.incPC();
Cycles.addToCycles(1);
}
}

View File

@@ -97,12 +97,12 @@ public class CommandDecoder
if (input == 0x0064)
{
//clrwdt();
return new Clrwdt();
}
if (input == 0x0009)
{
//retfie();
return new Retfie();
}
if (input == 0x0008)

View File

@@ -3,9 +3,10 @@ package de.darkress.pic16f84sim.microcontroller;
public class Cycles {
private static int cycles = 0;
public static void addToCycles(int increase)
public static void incCycles()
{
cycles += increase;
Timer.decreasePrescaler();
cycles++;
}
public static int getCycles() {

View File

@@ -0,0 +1,13 @@
package de.darkress.pic16f84sim.microcontroller;
public class Interrupt
{
private static boolean globalInterruptEnabled() {
return (Memory.getRegister(0x0B) & 0x80) == 0x80; // Check GIE
}
public static boolean checkTimerInterruptConditions() {
boolean timerInterruptEnabled = (Memory.getRegister(0x0B) & 0x20) == 0x20;
return globalInterruptEnabled() && timerInterruptEnabled;
}
}

View File

@@ -4,6 +4,13 @@ import java.util.Arrays;
public class Memory
{
public static void initMemory()
{
Memory.memory[0x81] = 0xFF; //Option
Memory.memory[0x85] = 0x1F; //TrisA
Memory.memory[0x86] = 0xFF; //TrisB
Memory.setRegister(0x03, 0x18); //Status
}
private static final int MEMORY_SIZE = 0xFF; //Addressable Memory
public static int workingRegister = 0;
private static final int[] memory = new int[MEMORY_SIZE];
@@ -47,12 +54,20 @@ public class Memory
setDataFromIndirectAddress(indirectAddress, data);
return;
}
if(address == 0x01 && !Timer.getPrescalerAssignment()) //Reset PrescalerCounter if change on Option or Timer
// Register
{
Timer.resetTimeToTimerIncrease();
Timer.setCyclesToTimerIncrease(Timer.getCyclesToTimerIncrease() - 1); //Decrease by one to account for
// this command execution
}
if((Arrays.stream(bank0UniqueSpecialRegister).anyMatch(x -> x == address)) && getRegisterBank() == 0)
{
memory[address] = data;
return;
}
if((Arrays.stream(bank1UniqueSpecialRegister).anyMatch(x -> x == address)) && getRegisterBank() == 1)
if((Arrays.stream(bank0UniqueSpecialRegister).anyMatch(x -> x == address)) && getRegisterBank() == 1) //bank0
// because of 7 Bit address
{
memory[address + 128] = data;
return;
@@ -72,6 +87,12 @@ public class Memory
private static void setDataFromIndirectAddress(int address, int data)
{
if((address == 0x81 || address == 0x01) && !Timer.getPrescalerAssignment()) //Reset PrescalerCounter if change on Option or Timer Register
{
Timer.resetTimeToTimerIncrease();
Timer.setCyclesToTimerIncrease(Timer.getCyclesToTimerIncrease() - 1); //Decrease by one to account for
// this command execution
}
if((Arrays.stream(bank0UniqueSpecialRegister).anyMatch(x -> x == address)) || (Arrays.stream(bank1UniqueSpecialRegister).anyMatch(x -> x == address)))
{
memory[address] = data;
@@ -79,10 +100,6 @@ public class Memory
}
memory[address % 128] = data; // else: Registers.Registers which are mapped
memory[address % 128 + 128] = data; //Ensure data is written to both banks to simulate mapping
if(address == 0x2) //Check if PCL is destination
{
ProgramCounter.loadPc();
}
}
private static int getRegisterBank()
@@ -94,7 +111,7 @@ public class Memory
return 1;
}
private static int getFSR()
public static int getFSR()
{
return memory[0x4];
}
@@ -121,6 +138,28 @@ public class Memory
memory[0x8A] = data & 0x1F;
}
public static int getOption()
{
return memory[0x81];
}
public static int getPortB() {
return memory[0x06];
}
public static int getPortA() {
return memory[0x05] & 0x1F;
}
public static int getTimer()
{
return memory[0x01];
}
public static void setTimer(int data)
{
memory[0x01] = data;
}
public static boolean getZeroBit()
{
return (memory[0x03] & 0x04) == 0x04;

View File

@@ -36,4 +36,12 @@ public class ProgramCounter
pc++;
Memory.setPCL(pc & 0x00FF);
}
public static void setProgramCounter(int value) {
if(value <= 0xFF && value >= 0)
{
pc = value;
Memory.setPCL(pc);
}
}
}

View File

@@ -18,10 +18,6 @@ public class Stack
return stack[stackPointer];
}
public static int peek()
{
return stack[(stackPointer + 7) % 8]; //Get TopOfStack -1 +8 = 7 and modulo 8 to avoid IndexOutOfBound
}
private static void pointNext()
{

View File

@@ -0,0 +1,82 @@
package de.darkress.pic16f84sim.microcontroller;
public class Timer
{
public static int getCyclesToTimerIncrease()
{
return cyclesToTimerIncrease;
}
public static void setCyclesToTimerIncrease(int cyclesToTimerIncrease)
{
Timer.cyclesToTimerIncrease = cyclesToTimerIncrease;
}
private static int cyclesToTimerIncrease = 1;
private static boolean timerEnabled()
{
return (Memory.getOption() & 0x20) != 0x20;
}
public static void resetTimeToTimerIncrease()
{
cyclesToTimerIncrease = getPrescalerFactor();
}
public static boolean getPrescalerAssignment() {
return (Memory.getOption() & 0x08) == 0x08;
}
private static int getPrescalerFactor() {
final int MULTIPLIER = 2;
int prescalerPower = Memory.getOption() & 0x07;
int prescaler = (int)Math.pow(2, prescalerPower);
if(!getPrescalerAssignment())
{
return prescaler * MULTIPLIER;
}
return prescaler;
}
private static void increaseTimerRegister()
{
int timerRegister = Memory.getRegister(0x01);
timerRegister = (timerRegister + 1) % 256;
if(timerRegister == 0) //check for timer Overflow --> interrupt
{
System.out.println("Timer Overflow");
Memory.setRegister(0x0B, Memory.getRegister(0x0B) | 0x04); //set T0IF
if(Interrupt.checkTimerInterruptConditions())
{
Stack.push(ProgramCounter.getPc());
ProgramCounter.setProgramCounter(0x04); // Interrupt Vector
}
}
Memory.setTimer(timerRegister);
}
public static void decreasePrescaler()
{
if(getPrescalerAssignment()) { // Assigned to WatchdogTimer
cyclesToTimerIncrease--;
if(cyclesToTimerIncrease == 0) {
resetTimeToTimerIncrease();
Watchdog.decreaseWatchdogTimer();
}
} else {
Watchdog.decreaseWatchdogTimer();
}
if(timerEnabled()) {
if(!getPrescalerAssignment()) { // Assigned to timer0
cyclesToTimerIncrease--;
if(cyclesToTimerIncrease == 0) {
resetTimeToTimerIncrease();
Timer.increaseTimerRegister();
}
} else {
Timer.increaseTimerRegister();
}
}
}
}

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package de.darkress.pic16f84sim.microcontroller;
public class Watchdog
{
private static int watchdogTimer = 18000;
public static int getWatchdogTimer()
{
return watchdogTimer;
}
public static void resetWatchdogTimer() {
watchdogTimer = 18000;
}
public static void decreaseWatchdogTimer()
{
watchdogTimer--;
checkWatchdog();
}
private static void checkWatchdog()
{
if(watchdogTimer == 0)
{
System.out.println("Watchdog Time-Out");
Memory.setRegister(0x03, Memory.getRegister(0x03) & 0xEF); //Clear !TO in StatusReg
}
}
public static void resetProgram()
{
Memory.setRegister(0x03, Memory.getRegister(0x03) | 0x10); //Set !T0 in StatusReg
ProgramCounter.setProgramCounter(0);
watchdogTimer = 18000;
}
}