Registers (#3)

* Byte Dataclass

* Added some abbreviations and registers of bank0

* New Bank approach

* implemented indirect Addressing of registers..partially

* Added other unique special registers to bank array

* Working Memory with direct and indirect addressing

* Some simplifications and branch removals

* Added working register

* Removed NewByte.java

* Simplified if statements

* Removed unneccesary check in if
This commit is contained in:
DarkressX
2023-05-19 22:24:58 +02:00
committed by GitHub
parent 97a75622f9
commit 9e73a08b8f
3 changed files with 148 additions and 2 deletions

4
.gitignore vendored
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@@ -25,4 +25,6 @@ hs_err_pid*
#IntelliJ Files
.idea
out
*.iml
*.iml
*.LST

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@@ -1 +1,22 @@
# pic16f84-sim
# pic16f84-sim
FSR = File select register > is a pointer:
Addressing INDF actually addresses the register whose
address is contained in the FSR register
SFR = Special function register
W = Working register
Status = Status register
GPR = General purpose register; Directly or indirectly accessible through FSR
C = Carry > Status register
DC = Digit Carry > Status register
Z = ZeroFlag > Status register
INTCON = Interrupt Condition(?) register
SRAM in Bank1 is mappend to Bank0

123
Registers.java Normal file
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@@ -0,0 +1,123 @@
import java.util.Arrays;
public class Registers
{
private static final int MEMORY_SIZE = 0xFF; //Addressable Memory
public static final int workingRegister = 0;
private static final int[] memory = new int[MEMORY_SIZE];
private static final int[] bank0UniqueSpecialRegister = new int[] {0x01,0x05,0x06,0x08,0x09}; //and many more
private static final int[] bank1UniqueSpecialRegister = new int[] {0x81,0x85,0x86,0x88,0x89}; //and many more
public static int getRegister(int address)
{
if(address == 0x0)
{
int indirectAddress = getFSR();
return getDataFromIndirectAddress(indirectAddress);
}
if(getRegisterBank() != 0)
{
if((Arrays.stream(bank1UniqueSpecialRegister).anyMatch(x -> x == address)))
{
return memory[address + 128]; //Write to correct memory address
}
}
return memory[address];
}
public static void setRegister(int address, int data)
{
if(address == 0x0)
{
int indirectAddress = getFSR();
setDataFromIndirectAddress(indirectAddress, data);
return;
}
if(getRegisterBank() != 0)
{
if((Arrays.stream(bank1UniqueSpecialRegister).anyMatch(x -> x == address)))
{
memory[address + 128] = data; //Write to correct memory address
return;
}
}
memory[address] = data;
}
private static int getDataFromIndirectAddress(int address)
{
if((Arrays.stream(bank0UniqueSpecialRegister).anyMatch(x -> x == address)) || (Arrays.stream(bank1UniqueSpecialRegister).anyMatch(x -> x == address)))
{
return memory[address];
}
return memory[address % 128]; // else: Registers which are mapped
}
private static void setDataFromIndirectAddress(int address, int data)
{
if((Arrays.stream(bank0UniqueSpecialRegister).anyMatch(x -> x == address)) || (Arrays.stream(bank1UniqueSpecialRegister).anyMatch(x -> x == address)))
{
memory[address] = data;
}
memory[address % 128] = data; // else: Registers which are mapped
}
private static int getRegisterBank()
{
if((memory[0x03] & 0x20) == 0x0) //Check RP0 Bit of Bank0 Status Register
{
return 0;
}
return 1;
}
private static int getFSR()
{
return memory[0x4];
}
public static boolean getZeroBit()
{
return (memory[0x03] & 0x04) == 0x04;
}
public static void setZeroBit()
{
memory[0x03] |= 0x04;
}
public static void clearZeroBit()
{
memory[0x03] &= 0xFB;
}
public static boolean getDigitCarryBit()
{
return (memory[0x03] & 0x02) == 0x02;
}
public static void setDigitCarryBit()
{
memory[0x03] |= 0x02;
}
public static void clearDigitCarryBit()
{
memory[0x03] &= 0xFD;
}
public static boolean getCarryBit()
{
return (memory[0x03] & 0x01) == 0x01;
}
public static void setCarryBit()
{
memory[0x03] |= 0x01;
}
public static void clearCarryBit()
{
memory[0x03] &= 0xFE;
}
}