9e73a08b8f
* Byte Dataclass * Added some abbreviations and registers of bank0 * New Bank approach * implemented indirect Addressing of registers..partially * Added other unique special registers to bank array * Working Memory with direct and indirect addressing * Some simplifications and branch removals * Added working register * Removed NewByte.java * Simplified if statements * Removed unneccesary check in if
23 lines
487 B
Markdown
23 lines
487 B
Markdown
# pic16f84-sim
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FSR = File select register > is a pointer:
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Addressing INDF actually addresses the register whose
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address is contained in the FSR register
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SFR = Special function register
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W = Working register
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Status = Status register
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GPR = General purpose register; Directly or indirectly accessible through FSR
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C = Carry > Status register
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DC = Digit Carry > Status register
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Z = ZeroFlag > Status register
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INTCON = Interrupt Condition(?) register
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SRAM in Bank1 is mappend to Bank0
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